Highly Dependable Multi-processor SoCs Employing Lifetime Prediction Based on Health Monitors
Yong Jun Zhao, Hans G. Kerkhoff · 2016
This paper describes the usage of IDDX monitors, which provide (periodic) data to be employed for predicting the remaining life-time of processor cores in homogeneous multi-processor SoCs during their lifetime. This forms the basis of self-repair with no down time for these SoCs and dramatically improving their dependability. This goal is accomplished by combining the optimally designed health monitors, such as delay and current monitors, to provide non-redundant data. Nowadays these can be implemented as embedded instruments which are IJATG compatible. Accelerated stress tests have been carried out using a set of processor cores in combination with a number of health monitors providing historic data. These results form the basis of a remaining lifetime model for delay (clock frequency), where the coefficients are determined by a genetic algorithm. After final test of a SoC these coefficients are periodically updated in an embedded processor during lifetime by the health monitors. In the case of seriously degrading cores, counteractions are automatically taken, like core isolation and (e.g. spare) replacement. Use is made of advanced run-time mapping software. The result is a zero mean down-time SoC with 40% reliability improvement in our 9 processor-core SoC.