IEEE 1149.1 test acess port (JTAG) verification using verilog simulation
Namita Arya, Amit Prakash Singh · 2016
The major causes of board manufacturing defects are: missing components, wrong components, mis-oriented components, broken track (opens), shorted tracks (track-to-track shorts), pin-to-pin solder opens, pin-to-pin solder shorts. To consider the shorts, we assume that the behavior of any short is logical i.e. the short behaves as if it were an unwanted wired-AND gate (strong 0, weak 1) or wired-OR gate (strong 1, weak 0). This is a realistic assumption given that the circuits receiving the result of a short are themselves digital and therefore will digitize the analog outcome of the short circuit.