Area optimized and high throughput AES algorithm based on permutation data scramble approach
V. Dilna, C. Babu · 2016
In today's scenario most of the things in human life is E-banking where everything is faster and smoother. With the various exchange of electronics signals between any two servers or systems, the money transactions can be done and this process is E-banking. Third party software is used for this E-banking feature where end to end users are secured. The proposed AES algorithm enhances the performance by resolving the security related issues for E-banking features and provides better throughput operations. The permutation step involved in the proposed AES algorithm resembles to Data Encryption Standard (DES) algorithm. The mode of data transmission in the modified AES is 128 bit plaintext and keys which converted into four 32bit blocks and exclusion of shift row. Using this feature not only area is optimized but also higher throughput is achieved. The high potential usage of same cryptographic algorithms risks the secure data processing so advanced changes should be incorporated. Design has been done using Verilog and simulated using Modelsim. The design has been synthesized using Xilinx for target device Vertex6.