A sparse tree adder with carry-select designed by reversible logic
Wang Ren-ping, Zhuang Tingting, Jiang Hao · 2016
In this paper, we proposed a 32-bit improved adder combined with sparse tree by radix-2 and carry select. We designed its models-point operation, carry-out, 4-bit ripple-carry adder and 4-bit selector by reversible logic, and designed with smic0.18um process corresponding MOS circuit to achieve. The simulation results could verify that the algorithm and the design by reversible logic are right.