Modify the µCS-51 Architecture to SIMD, VLIW and Superscalar µC
A. Fouda, Assem Badr · 2012
Computer architects have always strived to increase the performance of general purpose computers and special functional CPUs. The high performance may depend on the hardware chips manufacturing, however this trend has constrains, because there are limits of the physical technology, the other trend to increase the performance depend on the parallelism (multiple-processing). Recently the superscalar processing is the latest up-to-date technique of innovations aimed for producing ever-faster microprocessors, they are capable of executing more than one instruction in one clock cycle, in addition to perform multiple independent operations simultaneously. In this paper we modify the architecture of the conventional microcontroller (µC-51) using VHDL, also we develop some innovated special programmed instructions which utilize parallelism (via multiple processing units). Thus we present a modified superscalar processor using single instruction multiple data (SIMD) with very long instruction word (VLIW) architectures. The proposed modified microcontroller (MµC) has impact in reducing number of clock cycles per instruction, improvement of overall µC performance, and increasing transmission/reception data rate of the µC serial/parallel ports.