Low area and high speed SHA-1 implementation
Eun-Gu Jung, Daewan Han, Jeong‐Gun Lee · 2011
In this paper, a low area and high speed SHA-1 implementation with multi-input addition based on a carry-save adder is proposed. Compared with the fastest SHA-1 design up to date, our implementation reduces the area by 24.5% as well as increases the speed by 13.6%. When the proposed scheme keeps the same clock frequency as the counterpart, it decreases the area by 39.7% further.