Implementation of PLL based TRNG using Hardware Software Co- designing
Sushil C. Bagal, Vilas V Deotare, Dinesh V Padole, Swapnil C. Bagal · 2015
In hazardous environment, if attacker has enough computing power then it becomes difficult to use pseudo-random number in encryption algorithm. The solution to the problem is true random numbers which prevent attacker from predicting next random number sequence. This paper presents a True Random Number Generator (TRNG) using analog Phase-Locked Loop (PLL) on a digital Altera FPGA-based soft processor. It is built on the estimation of cost, power and performance metrics using hardware software co- designing. It optimizes the FPGA architecture to achieve mid - point result between hardware implementation and software implementation. TRNG embedded in SOPC is faster, cheaper and simpler than previous system and increases the security of the system in hostile environment.