Hardware implementation of face recognition using low precision representation
Sai Kumar Dwivedi, Siavoosh Payandeh Azad, Peeter Ellervee, Ratnakar Dash · 2016
Face recognition is an important biometric tool due to contact independence. In real time scenarios such as criminal record databases, it is vital to provide the user with high accuracy results in reasonable time. Compared to the software counter parts, the existing hardware solutions on FPGAs provide higher accuracy. However, such systems are not scalable due to high resource utilization (i.e. number of LUT, BRAMS and DSP slices) and have low recognition rate. In this paper, we propose a novel low precision representation of images and system parameters (feature vectors and network weights) based on two dimensional principal component analysis (2DPCA) and stochastic optimisation method - ADAM. The proposed design is not constrained by the size of the image. The Facial Recognition System (FRS) is implemented on Artix-7 XCA100T FPGA with 135.26 MHz clock frequency. It can recognize 5500 images per second with 98.75% accuracy on image of size 112 × 92.