Efficient scheduling scheme for eight-parallel MDC FFT processor
Jeong Keun Jang, Moon Gi Kim, Myung Hoon Sunwoo · 2015
This paper presents a new eight-parallel multi-path delay commutator (MDC) FFT processor based on the novel modified radix-26 FFT algorithm. The proposed FFT processor can achieve a high throughput and a low hardware complexity by using the efficient scheduling scheme that reorders data-paths. The proposed scheduling scheme and CSD approach can reduce the number of complex multipliers.