A Novel Approach to HW/SW Integration Testing of Route-Based Interlocking System
Jan Peleška, Wen-ling Huang, Felix Hübner · 2016
Recent progress in bounded model checking and inductive reasoning has shown that the fully automated verication of route-based interlocking system designs of realistic real-world complexity is possi- ble and ready for industrial application. In this paper, we present a new model-based testing strategy for interlocking system controllers that ex- ploits the fact that the design has already been veried, so that it can be used as a reference model for test case and test oracle generation. Our special interest lies in the eld of complete testing strategies that are able to uncover every implementation error, provided that the imple- mentation behaviour is captured in a pre-specied fault domain. Despite their guaranteed test strength, these strategies have two well-known dis- advantages: (1) applied in a naive way, they often result in an infeasible amount of test cases, and (2) the hypothesis that the real implementa- tion behaviour is captured by a member of the fault domain can rarely be justied in a convincing way. We describe a new combination of com- positional reasoning and input equivalence class generation techniques that removes problem (1). For coping with disadvantage (2), we sug- gest a combination of equivalence class and random testing that - while not being able to guarantee complete fault coverage for implementations outside the fault domain - results in a test strength that is signicantly higher than heuristic test approaches for interlocking system controllers. Estimates are presented that show how application of this novel strategy reduces the eort for HW/SW integration testing, while simultaneously increasing the fault coverage in comparison to more conventional testing approaches. ? This technical report is an extended version of the invited talk to be pre-