Performance analysis of NoC structure based on Star-Mesh Topology
Juyeob Kim, Mi-Young Lee, Wonjong Kim, Junyoung Chang, Younghwan Bae, Hanjin Cho · 2008
The fabrication technology development of the semiconductor leads the evolutional design methodology to reconsider the efficiency, such as reusability and scalability. NoC (Network On Chip) is the remarkable alternative to support this trend that provides the interface between IPs. In this paper, the general performance analysis through considering the characteristic of the NoC was done with the proposed NoC topology. Besides, the performance at the topology which is the specification application, 4-channel H.264 decoder, was predicted in advance. We could build the environment facilitating the adjustment of the buffer size and mapping of IP with this scheme.