Retiming of Circuits Using Clock Management Techniques
V. J. K Kishore · 2013
Retiming is one of the most powerful sequential transformations that relocates flip-flops in a circuit without changing its functionality and that optimizes the sequential circuit which improves performance. It is the concept of improving the timing behavior of a circuit by relocating flip-flops across logic gates to achieve faster clocking speed. It decreases the iteration period without affecting functionality. A lower iteration period implies faster execution. This paper proposes different clock management techniques which were implemented in asynchronous counter to minimize the clock period. In this work net skew and maximum delay of the clock and average connection delay, maximum pin delay and connection delay on critical nets will be compared. The Xilinx ISE Design suite, Modelsim-Altera has been used for simulation and programming was done in VERILOG model.