Memory based multiplier for digital FIR filter
Sujana Rani Akana, S. Jyothi · 2011
Memory based structures are well-suited for many digital signal processing (DSP) applications, which involve multiplication with a fixed set of coefficients. In this paper a lookup-table (LUT)-multiplier-based approach for an efficient memory-based implementation of finite impulse response (FIR) filter is realized where the memory elements store all the possible values of products of the filter coefficients. Memory-based structures are more regular compared with the multiply-accumulate Structures and have many other advantages of less area and reduced-latency implementation since the memory-access-time is much shorter than the usual multiplication-time compared to the conventional multipliers. In this paper this lut multiplier is compared with conventional multiplier like array multiplier using Xilinx which shows this memory based multiplier is having less no. of gates and less combinational delay.