H.264 Video Decoder Optimization on ARM Cortex-A8 with NEON
Chirag Pujara, Anurag Modi, G. S. P. Sandeep, Shilpa Inamdar, Deepa Kolavil, Vidhu Tholath · 2009
Optimization of H.264 base line profile decoder has been proposed for SIMD engine (NEON) of ARM Cortex-A8 processor. We have exploited data level parallelism to effectively use the SIMD capability of NEON. Ideas to make the algorithms SIMD friendly are also highlighted. With effective use of ARM Cortex-A8 architecture and NEON SIMD engine, the MCPS (Mega Cycles per second) requirement for decoding has reduced considerably as compared to our optimized C implementation. Results are provided for the overall performance gain in decoding and individual performance gain in various modules of H.264 base line decoder.