Low power-area efficient compressor design for fast digital arithmetic integrated circuits
K. Dhivyakala, Palavesam Thiruvalar Selvan, A. L. Kavitha · International Conference on Computing for Sustainable Global Development · 2016
In this paper, low power area efficient 4-2 compressor circuit is designed. A XOR-XNOR circuit is used for designing a 4-2 compressor circuit. The compressor consists of full adder and 2×1 mux block. In existing methods, 8T XOR-XNOR design is used for full adder design and transmission gates are used for implementing multiplexer. In proposed design, 5T XOR-XNOR and GDI multiplexer has been designed. The proposed technique can considerably minimize the power consumption. The implementation of compressor were done using Microwind Tool.