Reliable PUF design using failure patterns from time-controlled power gating
Xiaolin Xu, Daniel E. Holcomb · 2016
Physical Unclonable Functions (PUFs) leverage silicon process variations to generate unique keys or hardware identifiers. A common PUF mechanism is based on uninitialized power-up states of bistable storage elements, but any bias in these storage elements will reduce their sensitivity to process variations and induce correlated outputs. Alternatively, a high quality PUF can be created by exploiting differences in the failure propensity of instances of identical storage cells, and this approach does not require power-up states to be unbiased. Contrary to previous failure-based PUFs that induce failures by controlling supply voltage explicitly, in this work we propose a failure-based PUF that uses failures induced by controlling the duration of power gating. We demonstrate the approach in simulation using D flip-flop circuits, and show that it reliably produces high quality output bits.