ASIC for digital color image watermarking
M.V.V. Satyanarayana A nnajirao Garimella · 2005
The paper presents the design and implementation of an ASIC for the digital watermarking of color images. An efficient hardware architecture has been developed for invisible watermarking. The RGB color image is transformed to YUV and intensity values of luminance are modified in the spatial domain and transformed back to RGB. Two LSBs of the Y channel are watermarked, one with the. watermark bit and other with its complement, so that watermark detection is blind without the necessity of the original image or watermark. Analysis for the numerical representation of the binary transformation coefficients is also made. This watermarking-engine-on-chip is concept through GDSII solution and is implemented in 1.2 V, 0.13 /spl mu/m CMOS 6-metal DSM technology with the area of the chip being 545 /spl mu/m /spl times/ 525 /spl mu/m.