Structural analysis for digital devices for the simulation system
Vladimir I. Hahanov, Andriy Yegorov, Volodymyr I. Obrizan, A. Parfentiy · 2004
Fast algorithms for structural analysis of large digital devices containing millions of equivalent gates are offered. These algorithms are used in the preprocessing stage for increase of fault simulation and test generation speed. The data structures and program procedures for algorithm realization are described. The ATPG system is offered.