Parallel Processing for a DSP Application using FPGA
Nonel S. Thirer, Aviram Souhami · 2006
In this paper we discuss a parallel architecture for an FPGA system including several embedded simple micro-processors (μP), for a digital signal processing application (DSP). Each μP in the system has a different purpose and a separate code unit, but all the μPs share the same data unit. The architecture of the μP can vary in type - it may be designed in the traditional form of a μP, or as a FIR filter, a video pattern generator and so on. Such systems can constitute a good solution when the DSP's main process can be divided into several processes. Every μP can be reprogrammed to perform more than one function, and a superscalar operation mode can be introduced and controlled by the programmer. This type of platform was designed and experimented for an audio synthesizer system.