Video DSP architecture and its application design methodology for sampling rate conversion
Koyo Nakamura, Masuyoshi Kurokawa, A. Hashiguchi, M. Kanou, K. Aoyama, Hiroshi Okuda, Seiichiro Iwase, T. Yamazaki · 2002
This paper describes the special architecture of the linear array DSP and design methodology for the application to convert sampling rate of the video signals. This methodology allows us to develop a detailed DSP application code for a given sampling conversion rate. Compared to the ASIC implementation of sampling rate conversion, the required time for implementation is drastically reduced. An example of conversion from HDTV to SDTV (wide) is given.