Implementation of RNS Multiplication in VLSI
Magdy Bayoumi · 2005
The implementation of RNS multiplication in technology is discussed in this paper. In environment the performance measures are area time, and the custom design approach is considered the main design philosophy. Three approaches have been analyzed for implementing modulo multipl iers; the look-up tahle, the modulo adder, and the systolic array. Within the rontext of this paper, the look-up table approach offers better performance in both area and time for the moduli up to 6 bits, while the modulo adder approach is perferable for the larger moduli. The systolic array approach offers regular layout, and it is superior in both area and time for very large modul i .