FPGA based Recursive Error Free Mitchell Log Multiplier for image Filters
Satish S. Bhairannawar, R Rathan, K. Bommanna Raja, K. R. Venugopal, Lalit Mohan Patnaik · 2012
The Multiplier plays an important role in implementing real time Biometric systems, hence high speed with error free multipliers has to be designed. In this paper we propose FPGA based Recursive Error Free Mitchell Log Multiplier for image Filters. The 2×2 Mitchell log multiplier is considered and error correction term is introduced to correct error, to obtain 2×2 Error Free Mitchell Log Multiplier (EFMLM). The higher order Mitchell Log Multiplier are derived from 2×2 EFMLM using Karatsuba Ofman parallel architecture multiplier with no error. The proposed multiplier is used to design Gaussian Filter to enhance the quality of fingerprint image. The Multiplier is synthesized using Spartan 3 FPGA family device XC3S1500-5fg320. It is observed that the performance of proposed architecture is better compared to existing architecture.