Fast modular multiplication using parallel prefix adder
Pravin P. Zode, Raghavendra B. Deshmukh · 2014
Public key cryptography applications involve use of large integer arithmetic operations which are compute intensive in term of power, delay and area. Modular multiplication, which is frequently used most resource hungry block. Generally, last stage of modular multiplication is implemented by using carry propagate adder whose long carry chain takes more time. In this paper, FPGA based Modulo multiplication architectures using Carry Save and Kogge-Stone parallel prefix adder are presented to reduce this problem. Proposed implementations are faster as compared to conventional carry save adder and carry propagate adder implementations.