Skew Insensitive Physical Links for Network on Chip
Daniele Mangano, Riccardo Locatelli, Alberto Scandurra, Carlo Pistritto, Marcello Coppola, Luca Fanucci, Francesco Vitullo, Dario Zandri · 2006
The increasing complexity, in terms of both physical dimension and performance demand of current systems on chip (SoCs) led to the development of new suitable interconnect architecture, leveraging on computer network technology, called network on chip (NoC). This paper describes two architectures of advanced physical link for NoC, the former based on mesochronous technology, the latter based on asynchronous