Introducing pipelining technique in an object-oriented processor
Mok Pak Lun, Anthony S. Fong · 2004
A high level instruction set computer (HISC) supports object-oriented programming (OOP) in the hardware level. HISC provides the objects' information to hardware through the use of tables and a data structure called operand descriptor. An implementation of the HISC architecture, currently named jHISC, is under research. It is a 64-bit processor that developed mainly targets for JAVA. In this paper, we discuss how the jHISC processor can use the pipelining technique to enhance the performance. We start from defining the stages in HISC, then the architectural design. Finally, some issues in the implementation of jHISC on FPGA are discussed.