A gate-array-based programmable Reed-Solomon codec: structure-implementation-applications
Tho Le‐Ngoc, M.T. Vo, B. Mallett, V.K. Bhargava · 2002
The structure, implementation, and potential application of a gate-array-based programmable Reed-Solomon encoder/decoder (codec) chip set is presented. The encoder is based on a transform encoding scheme. The decoder is based on a modified version of the time-domain decoding (transform decoding without transform) algorithm. This algorithm has a regular structure, which is important for VLSI implementation. The structure and its implementation based on VLSI gate-array CMOS technology are described. The decoder can correct both errors and erasures for standard for shortened systematic and transform code words. The decoding time is independent of the number of errors or erasures in the received word. The Reed-Solomon codec can be used as a stand-alone (ST) device or as a microprocessor peripheral (MP) component. In MP mode, the codec can be directly interfaced to any 8-b, 16-b or 32-b, standard microprocessor, microcontroller, or digital signal processor (DSP). In ST mode, the codec operates as a standalone device, directly in the data symbol stream. It does not require a processor or any external buffer.>