Regulus: A high performance VLSI architecture
S. Sims, J. Benkual · 1988
A description is given of the Regulus processor, a high-performance microprocessor designed to take full advantage of custom VLSI. The general-purpose 32-bit Regulus architecture is designed to minimize control area and maximize the amount of on-chip memory. The instruction set is very simple, with memory addressed only through load and store instructions. The first design is implemented with a 1.2- mu m double metal CMOS technology. The architecture is implemented with two full-custom CMOS VLSI devices, the instruction processor (IP) and the arithmetic processor (AP). Attention is focused on the IP chip, and some of the innovative features of its architecture and design are described.>