HIPERMA: A high performance and reconfigurable processor for SAR applications
Shushan Qiao, Yong Hei, Xinfeng Xu, Bin Wu, Yumei Zhou · 2007
In this paper, a high performance and reconfigurable MAC Array (HIPERMA) processor is designed for Synthetic Aperture Radar (SAR) systems. HIPERMA is composed of many coarse-grained reconfigurable units and can be configured to finish the algorithms based on matrix multiplication level. The processor maintains the performance of ASIC devices and flexibility of DSP, and also has inherent advantages over FPGA in terms of delay, area and configuration time. The measurement result shows it has a peak performance up to 20,000 MMACS based on SMIC 0.18 urn six-metal CMOS process.