A Fully-multiplexed Pole Shared Switched Capacitor Lerner Filter Bank
JS Chang, YC Tong · 1989
A Switched Capacitor Fully-Multiplexed Pole Sharing methodology for implementing Linear Phase Bandpass Lerner filter banks is proposed. Using this methodology, the hardware reduction is achieved in four ways. First, the efficient non-minimum phase Lerner filter approximation is employed to minimize the number of poles required to satisfy a given filter specification in frequency and time domains. Second, the number of poles is reduced by Pole Sharing. Third, hardware requirement is simplified by Full-Multiplexing and fourth, the circuit realization is micropower compatible. In the case of the 4 pole pair per channel 16 channel Bandpass filter bank example discussed in this paper, the total hardware reduction is substantially greater than 50 % when compared to a conventional direct design employing minimum phase filter approximations. The proposed technique is parasitic insensitive.