Industrial Scale Formnal Verification Using Concurrent GSTE
Jin Seok Yang, Rajnish Ghughal, Andreas Tiemeyer · 2006
We give a detailed description of the formal specification and verification of a complex Intel(R) Pentium(R) 4 resource scheduler with over one thousand state elements using concurrent GSTE (CGSTE) l. CGSTE is a powerful extension of GSTE (generalized symbolic trajectory evaluation) for succinctly specifying and efficiently verifying the concurrent behavior of a complex circuit. We show how an operational high level specification (HLS) for the hardware was developed and cleanly captured in an algebraic-style specification language in CGSTE. The correctness of the hardware implementation was automatically verified against the HLS using the CGSTE model checker in the matter of two minutes.