Synthesis tools and design environment for dynamically reconfigurable FPGAs
Valery Sklyarov, Nuno Lau, Arnaldo S. R. Oliveira, A. Melo, K. Kondratjuk, A. Ferrari, R. Monteiro, Iouliia Skliarova · Symposium on Integrated Circuits and Systems Design · 1998
This paper discusses a range of problems in architectural and logic synthesis of digital devices and suggests practical approaches, methods, and tools for the automatic translation of a behavioural specification into a hardware implementation using a dynamically reconfigurable FPGA of the XC6200 family. The work described in this paper covers two basic areas. Firstly, new FPGA-oriented methods for behavioural synthesis of virtual digital circuits within predefined scopes are presented Secondly, an integrated design environment for logic synthesis (IDELS) is described which has been implemented as an extension of commercially available tools. IDELS permits synthesis in accordance with the developed design flow and offers very powerful run-time debugging facilities, including support for dynamic reconfiguration.