Reconfigurable Android with an FPGA Accelerator for the Future Embedded Devices
Hironori Nakajo, Keisuke Koike, Atsushi Ohta, K. Ohshima, Kaori Fujinami · 2011
We have implemented an FPGA accelerator, which realizes higher performance by executing a part of a Java source code executable in hardware, to accelerate Java execution in an Android mobile terminal. Between an Intel Atom processor which executes a Dalvik virtual machine and an FPGA accelerator, we have implemented PCI Express interface which performs high speed communication of 1.25 Gbps with DMA transfer in our experimental environment. In this paper, acceleration of Android with an FPGA accelerator is described. Communication performance between a processor and an FPGA has been measured and the performance of image processing with the acceleration is evaluated.