Character recognition with CMAC on field programmable gate array
Shaohan Liu, Jzau‐Sheng Lin, Shih-Yuang Huang · 2005
We proposed a cerebellar model arithmetic computer (CMAC) neural network to characters recognition on an FPGA architecture. The CMAC has many advantages in terms of speed of operation based on LMS training. Its ability realizes arbitrary nonlinear mapping and a fast practical hardware implementation. This work presents CMAC hardware that is about 35 times faster than that by the software executed on the conventional processor. In the experimental results, the CMAC is shown that it can clearly distinguish 94 characters with a size of 8/spl times/8 pixels though there are some noise pixels in a character.