A 0.5 μm CMOS technology for multifunctional applications with embedded FN-flash memory and linear R and C modules
R. Heinrich, Wolfgang Heinrigs, Georg Tempel, Josef Winnerl, Thomas Zettler · 2002
A 0.5 /spl mu/m CMOS technology was developed for multifunctional applications. Based on a high performance logic process for 3.3 V supply voltage a non volatile memory module and highly linear resistors and capacitors were implemented. The flash memory is programmed and erased by Fowler-Nordheim (FN) tunneling. The extremely low power consumption of the FN cell allows the in system programming with a single 3.3 V supply, which is especially important in portable systems. Bit programming and erasing times are typically 1 ms and 100 /spl mu/s, respectively. With page mode (128 bit) programming times of 10 /spl mu/s per bit are achieved. The endurance is better than 10/sup 5/ cycles.>