Frame Frequency Multiplier System for Stereo Video on Programmable Hardware
Haijin Fan, Fan Yang, Qingmin Liao · 2009
A frame frequency multiplier system based on field programmable gate array (FPGA) for time-sequential stereo video is proposed in this paper. The system converts two standard 60 fields/sec interlaced NTSC videos captured by two cameras in different perspective views to a 120 frames/sec time-sequential progressive stereo video. Video synchronization signals are generated based on look-up tables according to the timing of stereo video and a novel ping-pong approach realized by first-in first-out (FIFO) memories is applied to control video data acquisition and transmission in the system. It can provide high quality and flicker-free 3-D stereo images and thus will bring the stereo video system wide applications.