The cache architecture of the Apollo DN4000
C.R. Frink, P.J. Roy · 1988
The authors examine the cache architecture of the Apollo DN4000 workstation, which utilizes a virtual cache to provide a cost-effective approach to high-performance computing. Of particular interest is how the use of a virtually tagged, write-through cache made it possible to use a low-cost, off-the-shelf MMU (memory-management unit) and resulted in inclusion of a virtual write buffer. This architecture enables the processor to execute zero wait-state memory reads and writes. It is shown how the way that objects are accessed in Apollo's system led to a write-allocate cache update policy to solve the virtual address synonym problem.>