Execution of algorithms using a Dynamic Dataflow Model for Reconfigurable Hardware - A purpose for Matching Data
Jorge Luiz e Silva · 2006
The dynamic dataflow model in a reconfigurable hardware is a project of an architecture that explores the parallelism in a natural form, using the characteristics of the partial reconfigurable hardware. This project has been developed, and there are results of proof-of-concepts for a protocol between the operators. Specifically on this part of the project is the purpose to matching data into the operators. This paper describes the structure for the matching data