The design and evaluation of an active memory unit
Gabriel M. Silberman · 1980
This thesis explores the potentials of an unit. This unit is a computer module which provides, independent of the Central Processing Unit (CPU), a one-level space, subsuming in it all file I/O operations. In this context the new concept of Delayed-Staging Hierarchies is introduced. They are a generalization of Linear Storage Hierarchies consisting of additional paths connecting some directly to the CPU. It is proved that stack processing is applicable to this type of storage hierarchy, yielding an efficient algorithm for one-pass evaluation of several configurations. Also, a model for Delayed-Staging, based on power functions for cost and fault-ratios, is developed and solved using Geometric Programming. It results in a set of sizes and speeds for the storage levels which yield an optimal average access time under a given cost constraint. The thesis examines the implications upon system architecture and performance of having an active unit. It points out the reduction in size and complexity of an operating system which is assisted by an active unit and the benefits for programming languages (e.g. no explicit I/O). Several approaches to the conceptual design of CPU, operating system, I/O, management and their interfaces, which make use of the active unit's capabilities, are also presented. Of special interest are memory directives i.e. instructions to the unit to be executed in parallel with the unit's other functions.