Signal Processing System Design on FPGA
C. Chandra Sekhar · International Journal of Advanced Research in Electrical Electronics and Instrumentation Engineering · 2012
Adaptive Digital filter based on Least Mean Square (LMS) algorithm is widely used in the field of Digital Signal processing to iteratively estimate the statistics of an unknown signal.Architecture of adaptive filter is based on three major computing elements namely multiplier, adder and delay unit to realize the Finite Impulse Response (FIR) filter.The coefficients of the FIR filter are adjusted automatically by LMS of the error so as to match the adapted output to the des ired input.This paper explains the design of adaptive filter by two approaches.One is model based approach and other is Field Programmable Gate Arrays (FPGAs).The model based design approach is developed around MATLAB, SIMULINK and SYSTEM GENERATOR tools, which provide a virtual FPGA platform.Modern FPGA include the resources needed to design efficient filtering structures.The LMS algorithm has been implemented on CYCLONE II EP2C35F672C8 FPGA device, using ALTERA QUARTUS II development platform.The three major demonstrable applications cited in the present work are System Identification, Noise reduction and Echo cancellation.