Multi-core for K-means clustering on FPGA
Jose Canilho, Mário Pereira Véstias, Horácio C. Neto · 2016
In this paper, a configurable many-core hardware/software architecture is proposed to efficiently execute the widely known and commonly used K-means clustering algorithm. A prototype was designed and implemented on a Xilinx Zynq-7000 All Programmable SoC. A single core configured with the slowest configuration achieves a 10× speed-up compared to the software only solution. The system is fully scalable and capable of achieving much higher speed-ups by increasing its parallelism.