Feasibility exploration of partial Reconfigurable FPGA for REAL products
Robbie Vincke, Nico De Witte, Jeroen Boydens · Lirias (KU Leuven) · 2013
Partial Reconfiguration is the ability to dynamically modify blocks of logic by downloading partial bit files while the remaining logic continues to operate without interruption. The concept is analogue to a processor context switch. - System Flexibility: When a specific part of a design needs to be reconfigured it is sometimes necessary to preserve the existing communication link instead of resetting the full device. - Size and Cost Reduction: Some function are time-mutual exclusive to each other. This means some functions never need to exists on the same time. Instead of implementing all functions in parallel and selecting the needed function using a multiplexer, PR can dynamically change the needed function. - Power Reduction: In embedded systems where power efficiency is an issue. Some functions can be reconfigured with a blank bitstream to save power consumption. Also multiple versions of the same function can be made. A high-end implementation consuming a lot of power and a minimal implementation consuming much less power.