A Structured Visual Approach to GALS Modeling and Verification of Communication Circuits
Frank Burns, Danil Sokolov, Alex Yakovlev · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2016
In this paper, a novel globally asynchronous locally synchronous (GALS) modeling and verification tool is introduced for xMAS circuits. The tool provides a structured environment for GALS in which organization of the modeling and verification enables it to handle a variety of implementation tasks facilitating a process which would otherwise be difficult for the end user. The tool provides verification techniques at different levels. A new unfolding algorithm is presented that uses structured occurrence nets. A novel representation for deadlocks is introduced using deadlock relations enabling the causality of local and global deadlocks to be visualized. This helps in the investigation of total or partial system shutdown. In particular, the approach enables the visualization of point-to-point causality of problems occurring between different parts of the system which are more difficult to analyze. In addition different types of deadlock related to the synchronizer can be detected. The work presented here provides structured visualization capability facilitating the analysis of complex communication systems.