Simulation and Verification of Voltage and Capacitance Scalable 32-bit Wi-Fi Ah Channel Enable ALU Design on 40nm FPGA
Shivangni Singh, Madhavika Agarwal, Neha Agrawal, Anjan Kumar, Bishwajeet Pandey · 2015
In this paper, Wi-Fi ah channel enable 32-bit ALU on 40nm based Virtex-6 FPGA is designed using voltage scaling and capacitance scaling. It is Wi-Fi ah channel enable because we are operating our ALU with frequency of 0.9 GHz which is the frequency of ah Wi-Fi channel estimated to be released in 2016. We are analyzing effect of voltage scaling and capacitance scaling which are two of the different factors responsible for variation in power dissipation. We operated our ALU at 0.9 GHz at different voltages by also using capacitance scaling. Then we also analysed our design to work on different voltages irrespective of capacitances. In this Verilog is used as Hardware Description Language and XPower Analyser for Power calculation and Xilinx ISE Design Suite 14.2 as simulator.