Analysis of Leakage Power Attacks on DPA Resistant Logic Styles: A Survey
S. Shiney Immaculate, K. Manoharan · 2014
This paper discusses a general model of differential power analysis (DPA) attacks to static logic circuits.IC’s are vulnerable to side channel attacks .The attacker can gain information by monitoring the power consumption leaked by the switching behavior of digital complementary metal-oxide-semiconductor (CMOS) gates. In this paper, various aspects related to Leakage Power Analysis (LPA) attacks to cryptographic circuits are presented. These attacks aim at recovering the secret key of a cryptographic core from the measurements of its static (leakage) power. This method employs a comparison of different anti-DPA logic styles whose logic operates with power consumption independent of both logic values and sequence of data. This paper examines the noise characteristics of the power signals and effectiveness of LPA attacks on process variations are taken into an account.