A high-throughput and low-power design for bitmap indexing on 65-nm SOTB CMOS process
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong‐Kha Pham · 2016
Massive amounts of data generated from Internet-of-Thing and mobile devices bring a lot of challenges to big data analytics nowadays. In this paper, we propose the high-throughput architecture of a bitmap index creation (BIC) that can greatly accelerate data analytics tasks. BIC is implemented in a low-power 65-nm SOTB CMOS technology to minimize the leakage current in standby mode as well as total power consumption in active mode. By exploiting the hardware parallelism, the indexing throughput surpasses 1.7 times and 2.8 times as high as that of GPU-based and CPU-based designs, respectively. Furthermore, by applying the back bias voltage of −1.5 V, the leakage current significantly reduces approximately 89.2 times, as compared to that at VBB=0.4 V. The power consumption is 4.69 mW, or approximately 27.1 times as low as that of 180-nm bulk CMOS.