A compact, low power AES core on 180nm CMOS process
Van-Lan Dao, Van‐Phuc Hoang, Anh-Thai Nguyen, Quy-Minh Le · 2016
This paper presents a compact, low power AES cryptography core with a small S-box and an improved key expansion block for emerging wireless networks. The implementation results with an 180nm CMOS standard library show that the proposed AES core can reduce the area and power consumption significantly.