Implementation of High-Throughput Digit-Serial Redundant Basis Multipliers over Finite Field
Jyothi Leonore Dake, Sudheer Kumar Terlapu · IOSR Journal of VLSI and Signal processing · 2016
In elliptical curve cryptography the redundant basis (RB) multipliers for finite field have achieved immense popularity.The high-throughput multipliers are presented and they utilize redundant representation.In this paper, a novel recursive decomposition algorithm is presented for digit-level RB multiplication to obtain digit-serial implementation.The signal-flow graph (SFG) is extended to obtain the processor-space flow graph (PSFG) and also to acquire the three novel multipliers.Implementation of 10 bit digit-serial RB multipliers is presented in this work.The proposed structures are simulated and synthesized in Xilinx 12.2 using Verilog HDL.