PARALLEL DOMINATOR COMPUTATION ON A RAP
Shi‐Jinn Horng · International Journal of Parallel Emergent and Distributed Systems · 1994
Two constant time algorithms, which are based on the reflexive transitive closure of a directed graph, are proposed for computing dominators and dominator tree of a flow graph respectively. The parallel computation model used is a reconfigurable array of processors. A reconfigurable array of processors is defined to be an array of processors connected to a reconfigurable bus system whose configuration can be dynamically changed. Other applications that are based on the proposed algorithms are also solved in a constant time respectively. These problems include finding the back edges in a flow graph, recognizing the acyclic directed graph, recognizing the reducible flow graph, finding the natural loops, and finding the inner loop.