A 1.1 mW 32-thread artificial intelligence processor with 3-level transposition table and on-chip PVT compensation for autonomous mobile robots
Youchang Kim, Dongjoo Shin, Jinsu Lee, Hoi‐Jun Yoo · 2016
An ultra-low-power multi-threaded artificial intelligence processor (AIP) is proposed for real-time autonomous navigation of mobile robots. To achieve real-time operation under low power consumption, the proposed AIP adopts 3 key features: 1) an 8-thread tree search processor (TSP) for real-time path planning, 2) a 3-level transposition table cache (TT$) for the reduction of duplicated computations, and 3) an on-chip PVT compensation circuit (PVTC) for energy-efficient operation at near-threshold supply voltage. As a result, it achieves 470,000 state/s search speed and 79 nJ/search energy consumption which are 9.4× and 11× better than the general-purpose CPUs currently used in recent mobile robots. In addition, the AIP is successfully applied to the robots for autonomous navigation without any collision in dynamic environments.