A bus modeling framework for real-time/multimedia applications
J.K. Strosnider, Kevin A. Kettler · 1999
Historically, a system architect designed a PC to provide computational correct answers while achieving the highest possible system performance. The performance of a PC was measured in terms of average system performance with little value placed on guaranteed latencies within the system. Today, multimedia applications such as audio and video require timing correctness if the end user experience is to be acceptable. Real-time modeling provides a means to validate timing correctness of a system. Due to the high I/O demand in multimedia applications, a system bus is a critical component when evaluating the latencies of a multimedia computer system. This dissertation focuses on modeling a system bus so users can validate the real-time performance of the bus when transferring multimedia data. The user can guarantee latencies by stating the timing requirements of the bus traffic and performing a scheduling analysis. The goal of this research is to put a framework in place that allows the creation of real-time scheduling models for a diverse set of system buses. This dissertation unifies real-time scheduling theory with actual system bus architectures. The development of a bus model requires the creation of several basic real-time scheduling equations that capture the behavior of the bus scheduling policy. In this dissertation, the scope of bus scheduling policies includes fixed priority, round robin, fairness, and hybrid forms of bus scheduling policies. The scheduling models expand to incorporate overhead components such as the cost of arbitration, address generation, or system level tasks. A simple process allows the model developer to identify basic structural properties that define the underlying scheduling model. To verify the correctness of the model building process, we validate the Peripheral Component Interconnect (PCI) bus model against measurements on a Pentium processor system with a PCI bus interface. To demonstrate the generality of the framework, we develop bus models for several common personal computer buses, the Peripheral Component Interconnect (PCI) bus, the Micro Channel Architecture (MCA), and Futurebus+ (FB+). To demonstrate the utility of the bus scheduling models, we perform analytic comparisons of the buses when carrying multimedia traffic. The analysis exposes four methods for changing the real-time performance on a bus: changing the scheduling policy, changing the structure of the bus, changing the task set, or varying the bus parameters. The real value of a model lies in its utility to a bus user or a bus designer. The modeling methodology allows one to compare real-time performance of very unique bus structures, to tune a bus for optimal real-time performance, to configure a bus during setup operations, or to design a unique bus architecture tailored to a given multimedia applications.